Regaining The Edge In U.S. Chip Manufacturing
October 26, 2020
The United States is developing new strategies to prevent it from falling further behind Korea, Taiwan, and perhaps even China in semiconductor manufacturing, as trade tensions and national security concerns continue to grow.
For years, the U.S. has been a leader in the development of new chip products like GPUs and microprocessors. But from a chip manufacturing standpoint, the U.S. is losing ground in two critical areas. First, Intel and U.S. foundries are lagging in process technology against their Asian rivals in TSMC and Samsung. China is also closing the gap. Second, the U.S. has seen a sharp decline in new fabs and capacity.
The U.S. isn’t behind in all manufacturing segments. But chip manufacturing is critical for maintaining technical leadership, both from a supply chain and economic perspective, as well as for security reasons.
For years, U.S. companies were among the leaders in developing new chip products and manufacturing them in their own wafer fabs. And until 2011, when Intel introduced the first finFETs at 22nm, they led in process technology, which is a critical ingredient for chip scaling. Each new process enables smaller and faster devices.
But times have changed. Today, the dynamics are very different on the technology front, and they point to some alarming trends in the U.S. “We’ve been losing leadership in semiconductor manufacturing for a long time,” said Wally Rhines, CEO Emeritus at Mentor, a Siemens Business. “What’s even more important is leadership in the ability to provide leading-edge foundry services, which is much more than just manufacturing.”
This is a complex issue with a number of different facets. On one front, for example, the U.S. lags in a former stronghold—process technology. Intel, the U.S. technology leader, recently delayed its new process, causing it to fall further behind TSMC and Samsung on this front.
While Intel vows it will fix the problem and get back on track, this has national security implications. Having leading-edge processes onshore is essential for the U.S. Department of Defense and military/aerospace companies, as well as for business competitiveness. “You dominate chips and you dominate the defense, technology and intelligence industries,” said Robert Maire, president of Semiconductor Advisors, in a recent presentation. “Obviously, that goes hand-in-hand with global domination. One of the reasons the U.S. is so dominant is because of our technology, and that’s grounded in the semiconductor industry.”
At the same time, chipmakers continue to build new fabs in the U.S. at a slower pace than their Asian rivals. The U.S share of worldwide installed wafer fab capacity has declined from 37% in 1990 to 12% in 2020, according to the U.S. Semiconductor Industry Association (SIA) and Boston Consulting Group (BCG). During the same period, Asia saw a meteoric rise in the development of new fabs to the point where it now accounts for 80% of the world’s capacity.
China, in particular, has a very ambitious semiconductor agenda. Backed by $150 billion in funding, the country is developing its domestic IC industry and plans to make more of its own chips. To make matters worse, Greater China — which encompasses China, Hong Kong and Taiwan — is a geopolitical hotspot, and the U.S.-China trade war is compounding tensions in an area where all of the leading process technology is located today. Any disruption would have a major impact on U.S. access to leading-edge process technology.
Fig. 1: Share of global semiconductor manufacturing, 1990-2030. Source: SIA
U.S. policymakers recognize the needs to build more domestic fabs, but it’s an expensive undertaking. A leading-edge fab runs from $10 billion to $20 billion, and a return on investment isn’t guaranteed. And while manufacturing is critical, it is only one piece of the competitive equation. U.S.-based companies continue to lead in chip design, specialty processes, EDA tools and fab equipment.
Nevertheless, steps are being taken to shore up U.S. competitiveness on all fronts. Among them:
- Congress has proposed an incentive program to build new U.S. fabs.
- The U.S. hopes to get a chip consortium off the ground.
- GlobalFoundries and Intel are upgrading their technologies, and TSMC plans to build a new leading-edge U.S. fab.
- Intel has formed a new commercial entity to develop chiplet-based designs. Chiplets, which integrate dies in an advanced package, is emerging as a different way for the U.S. to remain competitive.
Wanted: More U.S. fabs
In the IC industry, companies compete in a multitude of different markets. At the same time, there is competition among nations on several different fronts. In technology, for example, various nations are competing for supremacy in 5G, AI and quantum computing.
China’s agenda has rekindled the worldwide competition in semiconductors. To understand the dynamics here, it helps to look back in time.
For decades, the IC industry has followed Moore’s Law, an axiom stating that transistor density in chips doubles every 18 to 24 months. Today’s chips have billions of tiny transistors in the same device. “A transistor is essentially a switch,” explained Nerissa Draeger, director of university engagements at Lam Research, in a blog. “A field-effect transistor uses an electric field to control the electrical conductivity through a channel.”
So for the past half century, chipmakers have followed Moore’s Law, which enabled them to pack more functions onto a single die. This has fueled the growth for cellphones, computers and other products.
In the early days of the semiconductor industry, though, the technology was rudimentary. In 1965, when Gordon Moore published his iconic observation, chips were produced on 1.25-inch (30mm) wafers. At the time, it cost $1 million to build a fab.
Then, for decades, most chipmakers manufactured chips in their own fabs, and also moved to larger wafer sizes over time. By moving to larger wafer sizes, vendors produced 2.2X the number of dies per wafer, enabling them to lower their manufacturing costs. But larger wafers also require bigger fabs with more expensive equipment.
Over time, semiconductor demand exploded, but so did fab and process costs. Starting in the 2000s, chipmakers migrated from 200mm to modern 300mm fabs. Initially, the cost to build a 300mm fab was $2 billion, compared to $700 million to $1.3 billion for 200mm fabs.
In 2001, there were 18 chipmakers with fabs that could process 130nm chips, which was the leading-edge process at the time, according to IBS.
Suddenly, the landscape changed. By then, several foundry vendors emerged from Asia and elsewhere that provided chip manufacturing services for outside customers. In those days, foundries were behind in technology.
Still, the foundry model took off during the 2000s. Initially, fabless design houses embraced foundries. “The semiconductor industry has seen the rise of the fabless model,” according to a paper from the SIA and BCG. (The authors are Antonio Varas, Raj Varadarajan, Jimmy Goodrich and Falan Yinug.)
During that period, many chipmakers in the U.S. and elsewhere no longer could afford to develop new fabs and processes. In response, some chipmakers went fab-lite. In this model, vendors produce some chips in their own fabs, while outsourcing other devices to foundries. Some went fabless or exited the business entirely.
However, Intel and others maintained their own fabs, saying it gave them a competitive advantage.
Over time, though, the manufacturing pendulum swung to Asia. Early on, several Asian nations supported their domestic chip companies with tax breaks and incentives. This fueled a fab boom in China, Korea, Taiwan and Singapore. “Government policies have been a major factor in this strong growth in Asia,” according to the SIA and BCG paper.
Those investments have paid big dividends. Taiwan is the leader in terms of worldwide fab capacity, with a 22% share in 2020, followed by South Korea (21%), Japan (15%), China (15%), the U.S. (12%), and Europe (9%), according to the SIA and BCG.
China is the one to watch, though. The nation is pouring billions of dollars in the form of subsidies into its domestic chip design and manufacturing sectors. China’s share of fab capacity will jump from 3% in 2000 to 15% in 2020, surpassing the U.S., according to the SIA and BCG.
China is behind in technology, but the nation is aggressively playing catch-up. “China is building a dozen new fabs,” said Leo Pang, chief product officer at D2S. “Yet there are still many challenges for China, including the need for more talent and IP in semiconductor manufacturing, and the need to further narrow the gap in the leading process technologies.”
While China is expanding, the U.S. remains stagnant. In total, the Americas region consists of 76 production fabs in 2020, down from 81 in 2010, according to SEMI. “This includes U.S. fab manufacturing capacity from non-U.S. companies, such as Samsung, NXP, Infineon, X-Fab, Tower, TSMC and Broadcom. It also includes GlobalFoundries,” said Christian Dieseldorff, an analyst at SEMI.
Excluding the non-U.S. fabs, the share of fab capacity among U.S.-owned companies dips to 10%, Dieseldorff said. Overall, the U.S. share in fab capacity is a mixed bag with analog at 30%, logic at 12% and memory at 5%, according to SIA and BCG.
Still, there are new U.S. fab projects in the works, according to SEMI. They include:
- Cree: SiC devices (New York)
- GlobalFoundries: Foundry (New York)
- Intel: Logic (Oregon)
- TI: Analog (Texas)
- TSMC: Foundry (Arizona)
Going forward, the U.S. wants to build more fabs for national security and supply chain purposes. “As global competitors invest big to attract advanced semiconductor manufacturing to their shores, the U.S. must get in the game and make our country a more competitive place to produce this strategically important technology,” said John Neuffer, president and CEO of the SIA. “The percentage of global semiconductor manufacturing done in the U.S. has fallen sharply over the last 30 years, mostly because other countries offer big government incentives and the U.S. does not. Over the same period, federal investments in semiconductor research have been flat as a share of GDP and are now just a tiny fraction of the R&D investments from U.S. semiconductor companies, which totaled nearly $40 billion in 2019. The U.S. has an opportunity to really turn the tide and boost domestic chip manufacturing and research, which will strengthen U.S. chip technology and our country’s economy, national security, supply chain resilience, and response to future crises like the pandemic.”
There are some solutions, including a proposed bill from the U.S. Congress. The bill, called the Creating Helpful Incentives to Produce Semiconductors for America Act (CHIPS), calls for $10 billion for a new federal grant program that would incentivize building new U.S. fabs. It also includes an investment tax credit. In total, it’s a $22 billion package.
Today, though, the bill is stuck in Congress, and it’s unclear if it will ever fly. Plus, the bill is simply too little and too late. To become competitive, the U.S. semiconductor industry requires a $50 billion incentive program, according to the SIA and BCG, but even that figure falls short.
That would barely foot the bill for even a few fabs. For example, in Taiwan, TSMC is building a 300mm fab for its 3nm process at a price tag of $19.5 billion.
Plus, the cost of building new fabs in the U.S. is more expensive than Asia. And other countries provide better incentives. So while Intel is ramping up its new Fab 42 facility in Arizona, it also has plans to build new fabs in Ireland and Israel because of incentives in those countries.
Nonetheless, Intel and others have argued that the CHIPS bill is a good start, and incentives are needed in one form or another. “We’re at 12% now in U.S. share,” said Greg Slater, vice president of the Policy and Technical Affairs Organization at Intel. “That could drop to below 10% over the next decade. That will continue unless, of course, we reverse it through government incentives.”
It isn’t that simple. “U.S. fab capacity could be subsidized to grow larger than 12%, but is that good for the industry?” asked Adrienne Downey, an analyst at Semico Research. “Over the past 5 to 10 years, the industry has been doing a good job of managing capacity. The memory market is a great example of this. Effectively managing capacity means more stable ASPs/revenues. In the past, subsidized fabs have caused capacity imbalances.”
There are other issues, too. “There are very few companies in the industry today that can fill a $20 billion fab. TSMC is successful at filling their fabs because they have hundreds of customers and thousands of products. Just adding capacity does not guarantee successful regional status in this industry,” Downey said.
Regardless, if the U.S. doesn’t get its act together in semiconductor manufacturing, there will be economic consequences. “It means that the growth of new technologies and innovation will gradually move to other parts of the world where the U.S. has been the leader,” Mentor’s Rhines said. “Recent venture capital investment by China is greater than the U.S., but it will take a while for them to catch up. The problem is if U.S. venture investment declines, even if offset by federal subsidies, the technology innovation will tend to drift away. That means that end equipment innovation also will drift away. It means that economic and job growth will slow.”
The process race
Meanwhile, U.S.-based chipmakers are holding their own in specialty processes like III-V, analog and RF. The U.S. is strong in mature logic processes at 28nm/22nm and above. “The U.S. continues to have a base of mature products still manufactured in the U.S.,” Semico’s Downey said. “In most electronic devices, every leading-edge chip requires at least 5-10 mature chips to go along with it. Companies such as Qorvo, ON Semi, NXP, ADI, Broadcom, Skyworks and Microchip all have fabs in the U.S. SkyWater is an example of a foundry breathing new life into an old fab by providing innovative options and helping to develop new solutions.”
But the U.S. is behind in leading-edge logic/foundry processes. It wasn’t always that way. For years, Intel was the leader in process technology, but it wasn’t the only contender. As stated, in 2001, there were 18 chipmakers that could process leading-edge 130nm chips.
Over time, process costs escalated and fewer players could afford to develop leading-edge technologies at advanced nodes.
The big change occurred at 20nm, when traditional planar transistors hit the wall. In response, Intel in 2011 moved to next-generation finFET transistors at 22nm. Foundries moved to finFETs at 16nm/14nm. (Intel’s 22nm is equivalent to 16nm/14nm from the foundries.)
Fig. 2: FinFET vs. planar. Source: Lam Research
FinFETs provide more performance at lower power, but they are also harder and more expensive to manufacture. “That’s due to the number of processing steps required to make that device,” said Ben Rathsack, vice president and deputy general manager at TEL America.
FinFETs also narrowed the manufacturing base. Only a half-dozen foundries/IDMs have the resources to migrate to finFETs at 16nm/14nm. These vendors include GlobalFoundries, Intel, Samsung, TSMC and UMC. China’s SMIC recently entered the 14nm finFET market.
In 2016, meanwhile, Intel hoped to extend its lead in logic technology with the introduction of its 10nm finFET process. But citing various issues, Intel delayed 10nm twice and finally shipped processors based on the technology in 2019 — roughly two years later than expected.
Amid the 10nm delays at Intel, TSMC in early 2018 shipped the world’s first 7nm finFET process, surpassing Intel in technology. Later, Samsung shipped 7nm. (Intel’s 10nm is roughly equivalent to 7nm from the foundries.)
This is important for several reasons. Intel, a bit player in the foundry business, doesn’t exactly compete against TSMC. However, TSMC provides foundry services to Intel’s competitors like AMD and Nvidia. So Intel’s competitors suddenly had a leg up in process technology.
There were other changes as well. In 2018, GlobalFoundries and UMC halted their respective 7nm efforts. The development of 7nm required huge investments, but both vendors said the return was questionable. Both companies are still active at 16nm/14nm and above.
Nonetheless, the 7nm shakeout narrowed the manufacturing base to just three companies at 10nm/7nm—Intel, Samsung and TSMC. But then, the landscape changed again.
In early 2020, TSMC and Samsung began shipping 5nm. Intel, meanwhile, delayed 7nm, putting it even further behind its two rivals. SMIC is also developing a 7nm-like process, which is still in R&D. Recently, SMIC achieved its first tape-out for the 7nm-like process from Innosilicon, a Chinese IP provider.
“Intel, obviously, stumbled here and now has what looks like a minimum six-month, and perhaps even a year, delay in 7nm,” Semiconductor Advisors’ Maire said. “Intel, rather than being neck-and-neck with TSMC, is clearly behind TSMC in Moore’s Law. GlobalFoundries, obviously, is frozen in place and stuck in time at 14nm. So we really don’t have a foundry or an IDM that’s up to speed in the U.S. anymore.”
The U.S. is not standing still. Intel vows it will fix the problem and eventually will ship 7nm. It also is mulling a plan to outsource some of its 7nm production to the foundries.
Then, in a separate effort to regain its edge, Intel hopes to get a U.S. chip consortium off the ground. As part of the plan, Intel has proposed to operate a U.S. foundry with backing from the government. It’s unclear if this plan will fly.
Recently, GlobalFoundries secured new land for a major expansion plan near its 300mm fab in New York state. “Amid growing consensus in our nation’s capital for investment in semiconductor manufacturing, it’s more important than ever that we are ready to fast track our growth plans at GlobalFoundries’ most advanced manufacturing facility in the U.S.,” said Ron Sampson, senior vice president and general manager at GlobalFoundries.
Perhaps the real hope for the U.S. rests with TSMC, which plans to build a new leading-edge 5nm fab in Arizona. The fab is slated for production in 2024.
Still, it’s not clear if the U.S. can regain its competitiveness in process technology, or which company will take the lead in the U.S. foundry business.
“We are behind in foundry-based manufacturing, and probably in all semiconductor manufacturing. We’re behind, but it’s nothing we couldn’t catch up with in a relatively short period of time,” Mentor’s Rhines said. “On the foundry side, we would have to build upon GlobalFoundries or a U.S. presence in TSMC. The government is leaning toward Intel as a possibility. But even if you could get viable foundry service in the U.S., if you can’t sell your product to the largest customers in the world it really doesn’t help you very much.”
Time for chiplets
Going forward, several companies from various nations will continue to compete in the process technology race. But that’s not the only way to remain competitive.
Typically, to advance a design, the industry develops an ASIC using chip scaling to fit different functions onto a single monolithic die. But scaling is becoming more difficult and expensive at each node, and the power and performance benefits from scaling alone are diminishing. While scaling alone can improve performance by about 10% to 20% for each new node below 7nm, architectural changes, specialized accelerators and hardware-software co-design can boost performance by 10X to 1,000X.
Moreover, not all parts of a chip benefit from scaling. Digital logic certainly does, but analog components do not. So rather than shrink everything and put it on a single die, the whole industry is shifting toward packaging of complex dies in advanced packages.
Today, companies, foundries and OSATs from several nations are pursuing a chiplet strategy, whereby a chipmaker may have a menu of modular dies, or chiplets, in a library. Customers can mix-and-match the chiplets and integrate them in an existing advanced package or a new architecture.
AMD, Intel and others have developed chiplet-like designs, which match or exceed the functionality of an ASIC at lower costs. But as more chiplets are developed for sale by third parties and across multiple markets, market dominance in new areas such as edge computing is up for grabs.
The momentum continues to build for chiplets. For example, Intel has been awarded a new contract for the DoD’s chiplet effort, called the State-of-the-Art Heterogeneous Integration Prototype (SHIP) program. Under the plan, Intel has established a new U.S. commercial entity around chiplets. This program gives customers access to Intel’s packaging capabilities, including the DoD and the defense community.
“The roadmap prioritizes and recognizes that as process scaling slows, heterogeneous assembly technology is a critical investment for both the DoD and our nation,” said Nicole Petta, principal director of microelectronics in the office of the Under Secretary of Defense for Research and Engineering at DoD.
Defining competitiveness is becoming more complicated. Process scaling for logic will continue to be critical, but advanced packaging is becoming important, as well.
Companies from various nations will need to develop both. That, in turn, will drive new growth. But from a technology standpoint, the U.S. still has some catching up to do. The question is whether there is the political will and/or the corporate payback to make that happen, and so far the answer isn’t clear.